ARM, will unveil its next-generation microprocessor core, the ARM10, this Autumn.
While the company declined to comment on the ARM10 except to say that it is under development, details of the core are expected to be revealed at an industry conference in October.
The ARM10 is described as a high-performance, low-power core. It is included in a session of the Embedded Processor Forum on microprocessors suitable for ASIC integration, which suggests it has a small die area.
At the forum, scheduled for Oct. 15 in San Jose, Calif., Dave Jaggar, director of ARM's design center in Austin, Texas, is scheduled to give a paper on a core that includes floating-point support, and is based on a new ARM pipeline architecture.
Development road maps shown in the past have the successor to the ARM9 family coming in 1999 in process geometries at about 0.18-micron and with a performance of around 500 Mips, which is more than the StrongARM SA-1-based processors, originally developed with Digital Equipment Corp. That raises issues of how ARM will position the ARM10 against Intel's SA-1-based chips and the SA-2 and SA-3 cores, which last week Intel announced were in development.
So far, all ARM cores including the StrongARM SA-1, have been based on a series of four versions of the basic instruction set and pipeline architecture. The ARM8 and SA-1 are based on version 4 while the ARM7T and ARM9T are based on version 4T.
But floating-point arithmetic support has been absent from most ARM-based processors due to a preference to save die area and power consumption. The ARM7-based 7500FE supports floating-point operations and the StrongARM SA-1500 supports single-precision floating-point operation through its attached media processor.
Speculation has centered on whether the ARM10 will include full support for a 64-bit word width or just for floating-point results. Last year Robin Saxby, ARM's chairman, president and chief operating officer, denied urgent interest in 64-bit operation, saying it ran counter to ARM's strengths in small die size, low power and high Mips/W.
Saxby will keynote the one-day embedded forum. Organized by MicroDesign Resources, it immediately follows MicroDesign's two-day Microprocessor Forum at the same location. For information, visit http://www.mdronline.com/.
Iomega has announced it has agreed to buy "certain assets" of its erstwhile storage rival SyQuest for a cash payment of $9.5 million.
The deal will give Iomega SyQuest's technology and intellectual property plus its inventory and US fixed assets. The purchase is conditional on the transfer of Iomega of inventory and equipment from SyQuest's Malaysian subsidiary.
However, the agreement does not transfer any of SyQuest's liabilities or material obligations, such as warranties and customer support, or any debts owed to SyQuest by third partes. All these will remain the responsibility of SyQuest itself.
The deal follows SyQuest's collapse and filing for Chapter 11 protection in November 1998. Soon after, SyQuest lawyers announced it was pursuing a buyer, and Iomega was widely tipped as the most likely purchaser.
Last week, SyQuest's Web site became active again to provide customer support and technical information. The company's lawyers said a deal was in the offing and that it hoped to get SyQyuest up and running normally very shortly.
While the deal will effectively see the end of SyQuest as a force in the storage market - with no intellectual property or fixed assets, there's not a lot it can do - it is good news for the many owners of malfunctioning SyQuest kit, much of it held at the company's premises for repair. With a $9.5 million cash injection, what's left of the company should be able to get working drives back to their owners.
However, the fact that Iomega was in a position to dictate terms - ie. we want all the important stuff but none of the liabilities - suggests SyQuest was in a parlous state indeed.